RISC-V FPGA Design & Verification Engineer - Contract

A leading technology company is seeking an FPGA Digital Design and Verification Engineer for a contract role in San Jose, California. This position involves developing and maintaining verification environments using SystemVerilog and UVM, debugging RTL, and working with communication protocols. Candidates should have a Bachelor's degree in Computer or Electrical Engineering and experience in digital design and computer architecture. The contract offers a competitive salary range of $100-105K USD.
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