SR Staff Signal Integrity Engineer (200G, HFSS, SerDes, ADS)
Confidential Company, San Jose, CA, United States
SR STAFF
Signal Integrity Engineer
(HFSS, Sigrity, ADS, PCB, PCIe, Serdes)
Fulltime position – Must work onsite 4-days a week in either
San Jose , CA or
Austin , TX or
Dallas
(Richardson), TX
CONFIDENTIAL :
Publicly traded computer HARDWARE infrastructure platform solutions company with over $5 Billion in sales whose
stock price has grown over 200%
in the last year because their products and services are used within
Ai Data Centers
.
---
Signal Integrity
design, simulation and validation for
PCB designs
used in
Ai
Data Center
Environment --
The Design Engineering team is experiencing dramatic growth in the USA and has several newly created openings at different
levels ranging from
SR Engineer, Staff, SR Staff, or Principal.
In general, the
Signal Integrity Engineer
provides design guideline and support to system architecture design, board layout, product bring up, debug, validation, and factory builds. They will also perform testing, simulation, validation and qualification of systems and makes design adjustments as needed.
The
Signal integrity Engineer
works in
cross-functional teams
with other designers, customers, manufacturing engineering and project leadership to ensure robust and high-quality product development.
Define and develop and validate Signal Integrity for next generation technologies for Networking, Server, and Storage products used in
Hardware Platform Solutions
for
HPC – High Performance Computing
and
Ai Data Centers .
Models
high-density I/O' s
on PCB s,
packages , connectors and probe cards with respect to parameters such as reflections, bandwidth, and crosstalk.
Lead the design, development and implementation of technical solutions for complex
Signal Integrity
projects, involving multiple domains. Participate in project planning and scheduling.
Strong knowledge in
simulation tools
like
Hspice, Sigrity, ADS, Ansys SIwave, HFSS 3D.
Strong knowledge of
Signal Integrity
and
Power Integrity
fundamental concepts.
Strong experience in
Package
and
PCB modelling
is required.
Performs Transmission line & Via modelling and carry out experiments to
validate modelling outcomes
and methodologies.
Should be able to analyze and review the
layout files
related to
Signal Integrity
and
Power Integrity problems .
Should be able to provide practical solutions to
PCB/Package design
team based on
simulation results
and analysis.
Conducting
Simulation
of memory interfaces for
Board and Package ,
and
High-Speed Serial IO interfaces
for
Board and Package .
REQUIREMENTS
Must have BSEE (or similar) and
10+ years
of experience with a recent focus on
Signal Integrity
–
SI
and
PI design, modeling, simulation
and
validation .
Must have
Signal Integrity
experience working on high-speed design, simulation and validation with multiple layers of PCBs (20+) and high speeds 50 Gb/s (prefer 40 layers and 200 Gb/s).
Should be
Signal Integrity SME
(Subject Matter Expert) and skilled using
Ansys
HFSS ,
Sigrity , Keysight
ADS
(Advance Design Systems) for
EDA
(Electronic Design Automation),
Ansys SIwave, Siemens Hyperlynx, Matlab, Cadence Allegro,
and
VNA
(Vector Network Analyzer).
Should have expertise in
Signal Integrity, SIPI, SerDes, PCIe, PAM4 – PCB Board & Package – Simulation & Modeling.
Should have expertise in most of the following:
PCB Package /Multi-Layer Board SI and PI Modeling and Simulation.
Sponsorship is a possibility for the right skillset.
Must have great
English communication skills
and ability to work with teams located around the globe. Proven ability to articulate requirements and vision to large and diverse audience through architecture specs and give verbal presentations in technical forums.
Must be willing to relocate, and or live nearby and work
onsite 4 days a week
in
Austin , TX,
Dallas
(Richardson), TX or
San Jose , CA.
Signal Integrity Engineer
(HFSS, Sigrity, ADS, PCB, PCIe, Serdes)
Fulltime position – Must work onsite 4-days a week in either
San Jose , CA or
Austin , TX or
Dallas
(Richardson), TX
CONFIDENTIAL :
Publicly traded computer HARDWARE infrastructure platform solutions company with over $5 Billion in sales whose
stock price has grown over 200%
in the last year because their products and services are used within
Ai Data Centers
.
---
Signal Integrity
design, simulation and validation for
PCB designs
used in
Ai
Data Center
Environment --
The Design Engineering team is experiencing dramatic growth in the USA and has several newly created openings at different
levels ranging from
SR Engineer, Staff, SR Staff, or Principal.
In general, the
Signal Integrity Engineer
provides design guideline and support to system architecture design, board layout, product bring up, debug, validation, and factory builds. They will also perform testing, simulation, validation and qualification of systems and makes design adjustments as needed.
The
Signal integrity Engineer
works in
cross-functional teams
with other designers, customers, manufacturing engineering and project leadership to ensure robust and high-quality product development.
Define and develop and validate Signal Integrity for next generation technologies for Networking, Server, and Storage products used in
Hardware Platform Solutions
for
HPC – High Performance Computing
and
Ai Data Centers .
Models
high-density I/O' s
on PCB s,
packages , connectors and probe cards with respect to parameters such as reflections, bandwidth, and crosstalk.
Lead the design, development and implementation of technical solutions for complex
Signal Integrity
projects, involving multiple domains. Participate in project planning and scheduling.
Strong knowledge in
simulation tools
like
Hspice, Sigrity, ADS, Ansys SIwave, HFSS 3D.
Strong knowledge of
Signal Integrity
and
Power Integrity
fundamental concepts.
Strong experience in
Package
and
PCB modelling
is required.
Performs Transmission line & Via modelling and carry out experiments to
validate modelling outcomes
and methodologies.
Should be able to analyze and review the
layout files
related to
Signal Integrity
and
Power Integrity problems .
Should be able to provide practical solutions to
PCB/Package design
team based on
simulation results
and analysis.
Conducting
Simulation
of memory interfaces for
Board and Package ,
and
High-Speed Serial IO interfaces
for
Board and Package .
REQUIREMENTS
Must have BSEE (or similar) and
10+ years
of experience with a recent focus on
Signal Integrity
–
SI
and
PI design, modeling, simulation
and
validation .
Must have
Signal Integrity
experience working on high-speed design, simulation and validation with multiple layers of PCBs (20+) and high speeds 50 Gb/s (prefer 40 layers and 200 Gb/s).
Should be
Signal Integrity SME
(Subject Matter Expert) and skilled using
Ansys
HFSS ,
Sigrity , Keysight
ADS
(Advance Design Systems) for
EDA
(Electronic Design Automation),
Ansys SIwave, Siemens Hyperlynx, Matlab, Cadence Allegro,
and
VNA
(Vector Network Analyzer).
Should have expertise in
Signal Integrity, SIPI, SerDes, PCIe, PAM4 – PCB Board & Package – Simulation & Modeling.
Should have expertise in most of the following:
PCB Package /Multi-Layer Board SI and PI Modeling and Simulation.
Sponsorship is a possibility for the right skillset.
Must have great
English communication skills
and ability to work with teams located around the globe. Proven ability to articulate requirements and vision to large and diverse audience through architecture specs and give verbal presentations in technical forums.
Must be willing to relocate, and or live nearby and work
onsite 4 days a week
in
Austin , TX,
Dallas
(Richardson), TX or
San Jose , CA.