Emulation Engineer
Acceler8 Talent, Santa Clara, CA, United States
Locations:
Santa Clara, CA or Remote
Job Description:
We are seeking a Junior Emulation Engineer to support pre-silicon validation of advanced AI accelerator and SoC architectures. This role is ideal for someone interested in bridging hardware and software in a fast-paced semiconductor environment.
Responsibilities:
Develop and maintain emulation and FPGA prototyping platforms
Adapt SoC designs for emulation and prototyping
Develop and debug emulation testbenches and system-level environments
Support pre-silicon validation, power/performance analysis, and early software bring-up
Partner with firmware/runtime teams to enable driver and application testing on emulators
Collaborate with design and verification teams to isolate issues and accelerate debug
Required Background:
BS/MS/PhD in EE, CS, or related field
3+ years of SoC design experience
Experience with emulation platforms such as Veloce, Palladium, or ZeBu
Experience with FPGA prototyping systems such as proFPGA, HAPS, or Protium
Strong understanding of digital design, RTL, Verilog/SystemVerilog, and SoC architecture
Proficiency with hardware debug tools, waveform viewers, and logic analyzers
Scripting experience with Python, Tcl, Perl, or similar languages
Familiarity with UVM, simulation, and testbench environments
SystemVerilog and UVM-based verification experience is a plus
Experience emulating high-speed I/O interfaces such as PCIe or UCIe, and memory technologies such as LPDDR or HBM, is a plus
Hands-on C/C++ development experience is a plus
Santa Clara, CA or Remote
Job Description:
We are seeking a Junior Emulation Engineer to support pre-silicon validation of advanced AI accelerator and SoC architectures. This role is ideal for someone interested in bridging hardware and software in a fast-paced semiconductor environment.
Responsibilities:
Develop and maintain emulation and FPGA prototyping platforms
Adapt SoC designs for emulation and prototyping
Develop and debug emulation testbenches and system-level environments
Support pre-silicon validation, power/performance analysis, and early software bring-up
Partner with firmware/runtime teams to enable driver and application testing on emulators
Collaborate with design and verification teams to isolate issues and accelerate debug
Required Background:
BS/MS/PhD in EE, CS, or related field
3+ years of SoC design experience
Experience with emulation platforms such as Veloce, Palladium, or ZeBu
Experience with FPGA prototyping systems such as proFPGA, HAPS, or Protium
Strong understanding of digital design, RTL, Verilog/SystemVerilog, and SoC architecture
Proficiency with hardware debug tools, waveform viewers, and logic analyzers
Scripting experience with Python, Tcl, Perl, or similar languages
Familiarity with UVM, simulation, and testbench environments
SystemVerilog and UVM-based verification experience is a plus
Experience emulating high-speed I/O interfaces such as PCIe or UCIe, and memory technologies such as LPDDR or HBM, is a plus
Hands-on C/C++ development experience is a plus