Senior Mixed-Signal ASIC DDR Design Engineer

Synopsys, Inc. is looking for an Analog Design Engineer in Sunnyvale, California, to design and optimize DDR I/O circuits for advanced semiconductor products. The ideal candidate has a BTech/MTech in Electrical Engineering and at least 3 years of experience in CMOS circuit design. You will work closely with cross-functional teams to implement high-performance chip solutions. We offer a comprehensive benefits package, promoting health and financial wellness. Join us to be part of a dynamic engineering team focused on innovation.
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