Senior SoC Timing & Clocking Engineer

Intel Corporation is seeking a SOC Physical Design Static Timing Analysis Engineer in Phoenix, Arizona. The successful candidate will play a crucial role in enhancing the performance and efficiency of Intel's cutting-edge SoC designs. With 8+ years in Electrical Engineering or related fields, expertise in timing analysis, and skills in TCL scripting, you will ensure designs meet functional and performance standards. This position offers a competitive compensation package and flexibility through a hybrid work model.
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