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Senior Silicon Photonics Design Engineer

II-VI UK, Ltd., Horsham, PA, United States


Primary Duties & Responsibilities

Design and tapeout silicon photonic integrated circuits (PICs) including integrated coherent receivers and integrated coherent transmitter PICs.

Design and prepare PIC layouts using industry‑standard PIC design flows including:

Synopsys OptoCompiler

Cadence Virtuoso‑based photonic design flows

Implement parametric layout cells (PCells) and scripted layout generation to support scalable photonic circuit design.

Develop and simulate passive photonic components.

Model and simulate active photonic devices.

Perform electromagnetic, optical, and electrical simulations using tools such as:

Lumerical (FDTD, MODE, DEVICE, INTERCONNECT)

CST Microwave Studio

HFSS

Tidy3D

ADS

Other PIC design and verification tools as required.

Support the local development of photonic components for multiple silicon photonics foundries and technology platforms.

Work closely with external silicon photonics foundries to successfully design, verify, and tapeout advanced PICs.

Conduct design corner analysis to ensure device robustness across process, voltage, temperature, and fabrication variations.

Perform post‑layout simulations and verification, including optical, RF, and electro‑optic performance validation.

Develop compact models and simulation workflows for system‑level verification of photonic circuits.

Collaborate with interdisciplinary teams including:

Electronics / IC design

Packaging engineering

Optical system engineering

Test engineering

Reliability engineering

Manufacturing and operations

Support product development through New Product Introduction (NPI) phases including prototype validation, characterization, and design improvements.

Work with reliability engineering teams to define qualification plans, including lifetime testing, environmental stress testing, and failure analysis.

Support transition from prototype to high‑volume manufacturing, including:

Design for manufacturability (DFM)

Process variation mitigation

Yield optimization

Test strategy development

Production monitoring and yield analysis.

Participate in design reviews, documentation, and technical presentations.

Mentor junior engineers and contribute to best practices for silicon photonic design within the organization.

Education & Experience

PhD or MS in Electrical Engineering, Applied Physics, Photonics, or related field.

Typically 5+ years of experience in silicon photonics design, integrated photonics, or optical communication systems.

Proven experience with silicon photonics PIC tapeouts and foundry interactions.

Skills

Strong expertise in silicon photonics device physics and PIC design methodologies.

Experience with electromagnetic simulation and photonic design tools.

Familiarity with photonic foundry design kits (PDKs) and layout environments.

Strong understanding of optical communication systems and coherent optical architectures.

Experience with RF design and electro‑optic device modeling.

Knowledge of packaging and fiber coupling techniques for photonic devices.

Programming experience for simulation automation and data analysis.

Strong problem‑solving, analytical, and debugging skills.

Excellent collaboration skills for working with cross‑functional engineering teams.

Working Conditions

Authorized to work in US

Safety Requirements
All employees are required to follow the site EHS procedures and Coherent Corp. Corporate EHS standards.

Quality and Environmental Responsibilities
Depending on location, this position may be responsible for the execution and maintenance of the ISO 9000, 9001, 14001 and/or other applicable standards that may apply to the relevant roles and responsibilities within the Quality Management System and Environmental Management System.

Equal Opportunity Statement
Coherent Corp. is an equal opportunity/affirmative action employer. All qualified applicants will receive consideration for employment without regard to sex, gender identity, sexual orientation, race, color, religion, national origin, disability, protected veteran status, age, or any other characteristic protected by law.

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