Job Description
- Design, simulate, and verify high-speed mixed-signal integrated circuits, in particular high-speed transceivers and high frequency PLLs
- Provide guidelines of floor plan and layout for IC layout engineers
- Provide practical guidelines for silicon package and PCB board layout for system design engineers
- Participate in measurement, characterization, and debugging of silicon
- Work within a cross-functional team
- Willing to travel to Asia
Qualifications
- BS or MS in Electrical Engineering. PhD preferred.
- 3+ years' experience in design of CMOS analog / mixed-signal circuits
- In-depth understanding of deep submicron CMOS process and related circuit design issues
- Familiar with Cadence custom design tools, circuit simulator, and timing analysis tool
- Good communication skills, fluent in English and Mandarin Chinese is a plus
- Prior design experience in Tx, Rx, CDR, PLL for high speed IO interfaces is a plus
- Knowledge in system level timing budget, signal integrity, and power integrity is a plusSolid understanding of transmission line and EM wave theory is a plus
- Experience in PCB layout and/or IC package design is a plus
- Self-motivated quick learner, team worker
Additional Information
All your information will be kept confidential according to EEO guidelines.
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