Lead SERDES Micro Architect—High-Speed IP Design

A leading technology company in Beaverton, Oregon, is seeking a SERDES Micro Architect to define the micro architecture of analog mixed-signal IPs used in their innovative silicon solutions. The role includes reviewing firmware code and circuits, leading debug efforts, and collaborating with various teams to ensure the design meets performance requirements. The ideal candidate has a BS degree and at least 10 years of relevant experience. #J-18808-Ljbffr