Senior Analog Layout Engineer — SerDes/PLL, Equity & Bonus

A leading tech company in California is seeking an experienced Analog Layout Engineer to provide onsite support for advanced nodes. With a focus on block and IP level design, candidates should have over 8 years of experience in analog or RF layout, familiar with deep sub-micron processes. The role offers a competitive salary from $120,000 to $192,000, along with bonuses and comprehensive benefits, including medical and a 401(K) plan. #J-18808-Ljbffr