Senior ASIC Verification Engineer for Space Communications

A leading aerospace company in Los Angeles is seeking a Senior ASIC Design Verification Engineer to lead the verification of complex digital subsystems for space-based communication ASICs. The role requires strong expertise in advanced verification methodologies, particularly System Verilog and UVM, alongside collaboration with multidisciplinary teams. Applicants should have 5–8 years of experience in ASIC verification and be able to identify gaps and drive coverage closure effectively.
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