Senior PCIe ASIC Verification Engineer

Synopsys, Inc. is seeking an ASIC Verification- Staff Engineer to drive innovation in verification methodologies and deliver high-quality IP cores for various applications. The ideal candidate should have a BSEE with 5+ years or MSEE with 3+ years of experience, strong expertise in System Verilog, and familiarity with verification methodologies like UVM. Responsibilities include developing test plans, debugging testbenches, and collaborating with cross-functional teams. This role promotes continuous learning and mentorship for junior engineers.
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