DFT & ASIC Design Intern — AI Hardware

A leading AI technology company in San Jose is seeking a DFT Intern for a 12-week paid internship. The role involves reviewing and refining DFT flow automation to support chip-level regression and contributing to various simulations. Ideal candidates should be pursuing a degree in electrical or computer engineering, with familiarity in Verilog or SystemVerilog and ASIC design concepts. The position offers mentoring from industry leaders and generous housing support for those relocating.
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