ASIC Design Verification Engineer
Qualcomm, Santa Clara, CA, United States
Company
Qualcomm Atheros, Inc.
Job Area
Engineering Group, Engineering Group > ASICS Engineering
General Summary
Qualcomm‑Atheros is a leading provider of wireless and wired technologies for the mobile, networking, computing and consumer electronics markets. We are focused on inventing technologies that connect and empower people in ways that are elegant and accessible to all. Qualcomm Atheros' teams deliver cutting‑edge products across every established wireless standard/protocol.
We are currently seeking candidates for positions involving the implementation of optimum system architectures, interfaces and logics for connectivity RF/Analog system. Successful candidates will be responsible for participating in the development of leading‑edge ASICs for multi‑function mobile platforms. Candidates will work with engineers or develop unit‑level and integrated‐level test benches. Candidate will assist in synthesis and gate‑level simulation tasks related to your module and will assist with timing of the entire chip. Candidate will leverage knowledge of wireless LAN, Bluetooth, and RF transceiver.
Ideal Candidate
RTL Design
ASIC front‑end experience
Scripting Languages knowledge (e.g., Perl or Python)
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may email disability-accomodations@qualcomm.com.
Pay range and Other Compensation & Benefits
Pay range: $126,700.00 – $190,100.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
For more information about this role, please contact Qualcomm Careers.
#J-18808-Ljbffr
Qualcomm Atheros, Inc.
Job Area
Engineering Group, Engineering Group > ASICS Engineering
General Summary
Qualcomm‑Atheros is a leading provider of wireless and wired technologies for the mobile, networking, computing and consumer electronics markets. We are focused on inventing technologies that connect and empower people in ways that are elegant and accessible to all. Qualcomm Atheros' teams deliver cutting‑edge products across every established wireless standard/protocol.
We are currently seeking candidates for positions involving the implementation of optimum system architectures, interfaces and logics for connectivity RF/Analog system. Successful candidates will be responsible for participating in the development of leading‑edge ASICs for multi‑function mobile platforms. Candidates will work with engineers or develop unit‑level and integrated‐level test benches. Candidate will assist in synthesis and gate‑level simulation tasks related to your module and will assist with timing of the entire chip. Candidate will leverage knowledge of wireless LAN, Bluetooth, and RF transceiver.
Ideal Candidate
RTL Design
ASIC front‑end experience
Scripting Languages knowledge (e.g., Perl or Python)
Minimum Qualifications
Bachelor's degree in Science, Engineering, or related field and 2+ years of ASIC design, verification, validation, integration, or related work experience.
Master's degree in Science, Engineering, or related field and 1+ year of ASIC design, verification, validation, integration, or related work experience.
PhD in Science, Engineering, or related field.
EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.
Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may email disability-accomodations@qualcomm.com.
Pay range and Other Compensation & Benefits
Pay range: $126,700.00 – $190,100.00. The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants. In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play. Your recruiter will be happy to discuss all that Qualcomm has to offer – and you can review more details about our US benefits at this link.
For more information about this role, please contact Qualcomm Careers.
#J-18808-Ljbffr