Senior PLL & High-Speed SerDes / Analog Design Engineer

A leading engineering recruitment firm seeks a PLL Design Engineer to address challenges in advanced node technologies, focusing on VCO design and performance characterization. The ideal candidate will possess a Master's degree or PhD in Electrical Engineering, with 5+ years of relevant experience and expertise in Cadence tools. This role offers the opportunity to oversee PLL integration into advanced transceiver technologies, supporting innovative developments in the field. The position is based in California with potential for remote work.
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