NAND Verification Design Engineer

A leading semiconductor company in San Jose is seeking a Design Engineer for the NAND Verification Engineering Group. The role involves designing and verifying digital circuits for memory product development, requiring strong technical expertise and leadership. Candidates should have a Bachelor’s or Master’s degree in Electrical Engineering and experience with digital circuits. The estimated salary range for this full-time position is $80,000 - $170,000 annually, with additional benefits and bonuses.
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