
Design Engineer I — DSP & SerDes System Modeling
Cadence Design Systems, Inc., San Jose, CA, United States
A leading technology company in California is seeking a talented engineer for DSP algorithm design in high-speed communication systems. You will model end-to-end systems, simulate performance, and verify designs through lab experiments. The position offers a competitive annual salary range of $88,900 to $165,100, along with various benefits like a 401(k) plan, stock purchase options, and medical coverage. Join us to innovate in the tech industry.
#J-18808-Ljbffr
#J-18808-Ljbffr