ASIC Timing Design Engineer: STA & Sign-off Expert

A leading technology company in Melbourne is seeking an ASIC STA Engineer responsible for timing sign-off and flow development in SoC design. You will innovate timing constraints and ensure sign-off quality timing. The ideal candidate has a Bachelor's in Electrical Engineering and experience in ASIC timing constraints. Strong communication skills are essential as you will collaborate with various teams to meet design goals. This opportunity promotes equal employment without regard to personal characteristics.
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