RTL Design Engineer for AI ASICs & High-Speed Digital

A cutting-edge AI technology firm in San Jose is seeking an experienced RTL Engineer to develop and implement design verification strategies for advanced ASIC designs. You will ensure the correct and efficient operation of AI chips. The ideal candidate has at least 5 years of experience in RTL development, is proficient in digital logic, and is eager to learn about modern AI technologies. Benefits include extensive medical coverage and housing subsidies.
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