Design Verification Engineer for High-Performance IP

A cutting-edge technology company in San Jose is looking for a Design Verification Engineer. This role involves ensuring custom IPs are robust and silicon-ready, developing testbenches, defining verification plans, and collaborating with various teams. Strong proficiency in UVM and SystemVerilog is required, alongside a deep understanding of digital design. The position offers competitive benefits including medical coverage and a housing subsidy for local employees. Join a dynamic team where engineering and research intersect.
#J-18808-Ljbffr