DRAM Design Verification Engineer – Hyderabad

An innovative memory solutions company located in Boise, Idaho seeks an Engineer in Design Verification to assist with the development and verification of new DRAM Design projects. This role requires a strong understanding of complex gate level circuit designs, proficiency in tools such as SPICE and Verilog, and collaboration with international teams. Candidates should have a solid educational background in Electrical Engineering or a related field, with less than 2 years to 8 years of experience, and should demonstrate strong analytical abilities.
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