Staff DRAM Design Verification Engineer

A leading memory technology firm in Boise, Idaho, is seeking a Staff Design Verification Engineer. This role focuses on validating advanced DRAM and memory architectures, requiring strong skills in CMOS circuit design and verification tools. Ideal candidates should possess a Bachelor's degree in Electrical or Computer Engineering and have experience with mixed-signal verification. Leadership experience and a collaborative spirit are essential as you will work with global teams to advance innovative memory solutions.
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