DFT Design Engineer for ML Acceleration on Custom SoCs

A leading technology company based in Austin, TX is seeking an experienced DFT Design Engineer specializing in Machine Learning Acceleration. This role involves defining DFT architectures and optimizing solutions for complex SoCs. The ideal candidate will have over 5 years of DFT experience and proficiency in RTL coding using Verilog. Compensation ranges from $136,000 to $184,000 annually, along with comprehensive benefits including health insurance, paid time off, and retirement plans.
#J-18808-Ljbffr