Senior ASIC/FPGA Design Engineer — Space & National Security

A leading aerospace company in Palo Alto is seeking a Sr. ASIC Design Engineer for the Starshield project, focusing on advanced technology for national security. Responsibilities include designing digital ASICs and collaborating with various teams. Ideal candidates have a Bachelor's degree in relevant fields and over 5 years of experience in RTL/FPGA development. The position offers a salary range of $170,000 to $235,000, along with comprehensive benefits including paid vacation and medical coverage.
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