Senior ASIC Design Engineer - Hardware
NVIDIA, Austin, TX, United States
Join the NVIDIA System‑On‑Chip (SOC) group as an ASIC Design Engineer and make a broad impact while working on cutting‑edge GPU and AI technology.
What You’ll Be Doing
Be an integral part of the team defining, developing, and delivering system‑level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs
Define, develop, and automate flows and methodologies to efficiently build, deliver, and support a system‑level IP
Deliver IP and support projects by applying the performance monitoring system
Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more)
Design and implement RTL features (microarchitecture and RTL)
Work with architects, designers, and software engineers to accomplish your tasks
What We Need To See
BS or equivalent experience in Electrical Engineering, Computer Engineering, or a related degree (advanced degrees a plus)
3+ years of relevant industry experience and strong coding skills in Perl/Python or other industry‑standard scripting languages
Experience in RTL design (Verilog), verification (SystemVerilog), System‑On‑Chip design/implementation flow, and design automation
Good understanding of SOC architecture, including CDC, multiple‑power domains, performance analysis, latency, and data flow
Excellent debugging and analytical skills
Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
Great communication and collaboration skills to interact within the team and with cross‑functional teams
Ways To Stand Out From The Crowd
Hands‑on experience in object‑oriented programming
Prior design on system level IP (Clocks/DFT/Resets)
Experience developing methodologies used by others
Hands‑on silicon debug is a plus
Exposure to physical design
Competitive salaries and a generous benefits package. Salary ranges for Level 3: $136,000 – $218,500; for Level 4: $168,000 – $264,500. You will also be eligible for equity and benefits.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. We do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
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What You’ll Be Doing
Be an integral part of the team defining, developing, and delivering system‑level methodologies and RTL to measure performance on the industry's leading GPUs and SOCs
Define, develop, and automate flows and methodologies to efficiently build, deliver, and support a system‑level IP
Deliver IP and support projects by applying the performance monitoring system
Run and debug RTL checks to ensure design quality (e.g., cross clock domains (CDC), clocks, reset, latency, and more)
Design and implement RTL features (microarchitecture and RTL)
Work with architects, designers, and software engineers to accomplish your tasks
What We Need To See
BS or equivalent experience in Electrical Engineering, Computer Engineering, or a related degree (advanced degrees a plus)
3+ years of relevant industry experience and strong coding skills in Perl/Python or other industry‑standard scripting languages
Experience in RTL design (Verilog), verification (SystemVerilog), System‑On‑Chip design/implementation flow, and design automation
Good understanding of SOC architecture, including CDC, multiple‑power domains, performance analysis, latency, and data flow
Excellent debugging and analytical skills
Exposure to design and verification tools (dc_shell or equivalent synthesis tools, VCS or equivalent simulation tools, debug tools like Debussy, GDB)
Great communication and collaboration skills to interact within the team and with cross‑functional teams
Ways To Stand Out From The Crowd
Hands‑on experience in object‑oriented programming
Prior design on system level IP (Clocks/DFT/Resets)
Experience developing methodologies used by others
Hands‑on silicon debug is a plus
Exposure to physical design
Competitive salaries and a generous benefits package. Salary ranges for Level 3: $136,000 – $218,500; for Level 4: $168,000 – $264,500. You will also be eligible for equity and benefits.
NVIDIA is committed to fostering a diverse work environment and proud to be an equal opportunity employer. We do not discriminate (including in our hiring and promotion practices) on the basis of race, religion, color, national origin, gender, gender expression, sexual orientation, age, marital status, veteran status, disability status, or any other characteristic protected by law.
#J-18808-Ljbffr