Digital Design Engineer (MPU)
BrainChip Holdings Ltd, Laguna Woods, CA, United States
Digital Design Engineer (MPU / AI Hardware)
Design the cores behind next-generation AI hardware
At BrainChip, we’re building a new class of AI hardware. Our neuromorphic processors enable real-time, ultra-efficient intelligence directly on devices.
We’re looking for a Digital Design Engineer to help design and implement the core compute architecture behind our next-generation systems.
This role sits within our hardware team and spans the full design lifecycle, from microarchitecture through RTL, verification, and silicon delivery.
If you enjoy building processors, working close to the hardware, and solving performance challenges for AI workloads, this is a strong fit.
What you’ll do
Translate product requirements into scalable microarchitecture designs
Design and implement digital modules using RTL
Develop and integrate processor cores including RISC-V-based architectures
Contribute to CPU design including pipeline, cache, and system architecture
Build and debug FPGA prototypes for system-level validation
Run simulations at RTL and gate level to verify functionality
Collaborate on verification strategies and test plans
Work closely with cross-functional teams across hardware and software
Document designs clearly to support development and bring-up
What you bring
3+ years of experience in digital design or RTL development
Strong understanding of modern processor and compute architectures
Experience with embedded MPU design, ideally RISC-V or similar
Proficiency in Verilog and SystemVerilog
Familiarity with SoC components, memory systems, and system buses such as AXI, AHB, or APB
Experience with simulation and debugging tools such as VCS, Verdi, or similar
Solid debugging skills and attention to detail
Nice to have
Experience with high-speed interfaces such as PCIe, USB, or DDR
Familiarity with standard interfaces such as SPI or I2C
Experience with Python or scripting for automation
Exposure to hardware-software co-design or AI workloads
Why this role
Work on real silicon powering next-generation AI systems
Contribute directly to processor and system architecture
Collaborate with a high-caliber hardware and software team
Build technology that runs in real-world devices
Details
Hybrid in Laguna Hills, CA (3 days onsite per week)
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Design the cores behind next-generation AI hardware
At BrainChip, we’re building a new class of AI hardware. Our neuromorphic processors enable real-time, ultra-efficient intelligence directly on devices.
We’re looking for a Digital Design Engineer to help design and implement the core compute architecture behind our next-generation systems.
This role sits within our hardware team and spans the full design lifecycle, from microarchitecture through RTL, verification, and silicon delivery.
If you enjoy building processors, working close to the hardware, and solving performance challenges for AI workloads, this is a strong fit.
What you’ll do
Translate product requirements into scalable microarchitecture designs
Design and implement digital modules using RTL
Develop and integrate processor cores including RISC-V-based architectures
Contribute to CPU design including pipeline, cache, and system architecture
Build and debug FPGA prototypes for system-level validation
Run simulations at RTL and gate level to verify functionality
Collaborate on verification strategies and test plans
Work closely with cross-functional teams across hardware and software
Document designs clearly to support development and bring-up
What you bring
3+ years of experience in digital design or RTL development
Strong understanding of modern processor and compute architectures
Experience with embedded MPU design, ideally RISC-V or similar
Proficiency in Verilog and SystemVerilog
Familiarity with SoC components, memory systems, and system buses such as AXI, AHB, or APB
Experience with simulation and debugging tools such as VCS, Verdi, or similar
Solid debugging skills and attention to detail
Nice to have
Experience with high-speed interfaces such as PCIe, USB, or DDR
Familiarity with standard interfaces such as SPI or I2C
Experience with Python or scripting for automation
Exposure to hardware-software co-design or AI workloads
Why this role
Work on real silicon powering next-generation AI systems
Contribute directly to processor and system architecture
Collaborate with a high-caliber hardware and software team
Build technology that runs in real-world devices
Details
Hybrid in Laguna Hills, CA (3 days onsite per week)
#J-18808-Ljbffr