DDR Memory Controller ASIC Design Engineer (1GHz+)

A leading technology innovator is looking for ASIC Design Engineers to architect and design next-generation DDR controllers. Responsibilities include developing RTL, collaborating with verification teams, and participating in C/C++ modeling of memory controller IP. Candidates should have a degree in Science or Engineering with 2+ years of relevant experience. The role offers a competitive compensation package and a comprehensive range of benefits.
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