Senior RTL Design Lead: High-Speed Memory & DDR/HBM

Synopsys, Inc. is looking for an experienced RTL Designer in Sunnyvale, California. You will design and verify DDRPHY/LPDDRR/HBM test chips while collaborating with analog and mixed-signal teams. Successful candidates will have over 6 years of experience in RTL design with a strong background in high-speed interfaces and scripting. The role involves mentoring peers and enhancing product quality through robust verification, ensuring rapid customer time-to-market with innovative memory solutions.
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