Postdoctoral Fellow (PREP0004280)
The American Ceramic Society, Gaithersburg, MD, United States
General Description
PREP Research Associate
CHIPS Funded Project.
This position is part of the National Institute of Standards (NIST) Professional Research Experience (PREP) program. NIST recognizes that its research staff may wish to collaborate with researchers at academic institutions on specific projects of mutual interest and thus requires that such institutions be the recipients of a PREP award. The PREP program requires staff from a wide range of backgrounds to work on scientific research in many areas. Employees in this position will perform technical work that underpins the scientific research of the collaboration.
Research Title
Metrology of Materials, Surfaces, and Processes for Semiconductor Advanced Packaging
Work Description
We are seeking a highly motivated researcher to advance measurement science for next‑generation hybrid advanced packaging. This role will contribute to the development of novel surface and materials metrology methods that enable predictive control of bonding processes and heterogeneous integration. The successful candidate will work within the Dynamic Mechanical Metrology Project of the Quantum Measurement Division to help establish the quantitative foundations needed for reliable, high‑density microelectronic assembly, supporting national efforts to strengthen U.S. leadership in semiconductor manufacturing and advanced packaging technologies.
Responsibilities
Design, model, and performance of test methods to evaluate bond quality of bonded chip pairs using different wafer materials and bond methods.
Design and fabrication of test rigs for bond strength measurement.
Implement bond strength testing at cryogenic and high temperatures.
Closely coordinate with teams performing materials characterization, surface and thin film characterization.
Qualifications
PhD in mechanical engineering, physics, electrical engineering, materials science, or a related field.
Experience with wafer and/or hybrid chip bonding processes.
Experience with destructive test methods, such as those utilizing materials test machines or related instruments.
Proficiency in finite element modeling, using tools such as COMSOL or ANSYS.
Proficiency in CAD, using tools such as SolidWorks or Autodesk.
Proficiency in programming languages, such as Python, Java, or Matlab.
Excellent communication skills and ability to work effectively in a team.
Desirable Qualifications
Experience, including process development, in back‑end semiconductor device fabrication, including wafer cleaning and handling.
Familiarity with silicon electronic and photonic device processing.
Experience with custom infrared microscopy and optical measurement setups.
US citizenship strongly preferred.
EEO Statement
The Johns Hopkins University is committed to equal opportunity for its faculty, staff, and students. To that end, the university does not discriminate on the basis of sex, gender, marital status, pregnancy, race, color, ethnicity, national origin, age, disability, religion, sexual orientation, gender identity or expression, veteran status or other legally protected characteristic. The university is committed to providing qualified individuals access to all academic and employment programs, benefits and activities on the basis of demonstrated ability, performance and merit without regard to personal factors that are irrelevant to the program involved.
#J-18808-Ljbffr
PREP Research Associate
CHIPS Funded Project.
This position is part of the National Institute of Standards (NIST) Professional Research Experience (PREP) program. NIST recognizes that its research staff may wish to collaborate with researchers at academic institutions on specific projects of mutual interest and thus requires that such institutions be the recipients of a PREP award. The PREP program requires staff from a wide range of backgrounds to work on scientific research in many areas. Employees in this position will perform technical work that underpins the scientific research of the collaboration.
Research Title
Metrology of Materials, Surfaces, and Processes for Semiconductor Advanced Packaging
Work Description
We are seeking a highly motivated researcher to advance measurement science for next‑generation hybrid advanced packaging. This role will contribute to the development of novel surface and materials metrology methods that enable predictive control of bonding processes and heterogeneous integration. The successful candidate will work within the Dynamic Mechanical Metrology Project of the Quantum Measurement Division to help establish the quantitative foundations needed for reliable, high‑density microelectronic assembly, supporting national efforts to strengthen U.S. leadership in semiconductor manufacturing and advanced packaging technologies.
Responsibilities
Design, model, and performance of test methods to evaluate bond quality of bonded chip pairs using different wafer materials and bond methods.
Design and fabrication of test rigs for bond strength measurement.
Implement bond strength testing at cryogenic and high temperatures.
Closely coordinate with teams performing materials characterization, surface and thin film characterization.
Qualifications
PhD in mechanical engineering, physics, electrical engineering, materials science, or a related field.
Experience with wafer and/or hybrid chip bonding processes.
Experience with destructive test methods, such as those utilizing materials test machines or related instruments.
Proficiency in finite element modeling, using tools such as COMSOL or ANSYS.
Proficiency in CAD, using tools such as SolidWorks or Autodesk.
Proficiency in programming languages, such as Python, Java, or Matlab.
Excellent communication skills and ability to work effectively in a team.
Desirable Qualifications
Experience, including process development, in back‑end semiconductor device fabrication, including wafer cleaning and handling.
Familiarity with silicon electronic and photonic device processing.
Experience with custom infrared microscopy and optical measurement setups.
US citizenship strongly preferred.
EEO Statement
The Johns Hopkins University is committed to equal opportunity for its faculty, staff, and students. To that end, the university does not discriminate on the basis of sex, gender, marital status, pregnancy, race, color, ethnicity, national origin, age, disability, religion, sexual orientation, gender identity or expression, veteran status or other legally protected characteristic. The university is committed to providing qualified individuals access to all academic and employment programs, benefits and activities on the basis of demonstrated ability, performance and merit without regard to personal factors that are irrelevant to the program involved.
#J-18808-Ljbffr