Senior IP Layout Engineer - Analog/Mixed-Signal

A leading memory technology firm is seeking a Layout Design Engineer in Boise, Idaho. The role involves designing critical analog and mixed-signal circuits, performing layout verification, and communicating effectively with global engineering teams. Qualified candidates should have 5 to 8 years of experience in analog/custom layout design in advanced CMOS processes. A degree in Electronic/VLSI Engineering is required. The company emphasizes innovation and is committed to transforming how the world uses information. #J-18808-Ljbffr