Layout & Mask Designer for DRAM & Memory Tech

A leading technology firm in California is seeking a Layout Engineer to develop block-level layouts and improve physical design strategies. The successful candidate will have experience with Cadence Virtuoso for building layouts and ensuring compliance with various verification methods. Strong communication skills and the ability to collaborate with global teams are essential. The firm offers a competitive salary and robust benefits package including medical and paid time off. #J-18808-Ljbffr