Design for Test Engineer: SoC Integrity & Excellence

A leading tech company in Cupertino seeks a Design for Test Engineer to own development for large SOC blocks. Responsibilities include collaborating with various engineering disciplines to ensure rapid product delivery. Candidates should be enrolled in relevant degrees such as BSEE, MSEE, or PhD and have knowledge of ASIC design flow and RTL design. This role offers competitive compensation ranging from $121,300 to $183,200, along with stock options and benefits.
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