Senior Die Design Engineer for 3D-IC & HBM Packaging

A leading technology company in Boise, Idaho, is looking for a Senior Engineer to support their High Bandwidth Memory packaging program. This role demands expertise in semiconductor design, specifically in die design and layout engineering. Ideal candidates will have over 5 years of experience, knowledge of advanced packaging techniques, and the ability to collaborate with various engineering teams. This position offers an opportunity to impact technology solutions that enhance data efficiency and intelligence in the market.
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