Senior ASIC Physical Design Engineer - P&R, Tapeout, Hybrid

A leading semiconductor technology company in San Jose seeks a Physical Design Engineer responsible for the entire APR implementation flow, including synthesis and signoff. The ideal candidate should have a Master's degree in Electrical Engineering and experience with major EDA tools. The role offers a hybrid work schedule and a competitive salary range of $110,000 to $160,000 annually, along with comprehensive benefits.
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