Senior Staff Engineer, Physical Design — Hybrid (Remote 2 Days)

A leading semiconductor company is seeking an experienced Physical Design Engineer to join their backend team. This role focuses on RTL synthesis ownership, LEC closure, UPF development, and VCLP sign-off for complex SoC designs. Candidates should have at least 4 years of experience in physical design with strong knowledge of RTL, synthesis optimization, and low-power design. Additionally, familiarity with tools like Cadence Genus and strong TCL scripting skills are essential. Join a forward-thinking team and contribute to innovative technology solutions.
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