Design Verification Engineer: High-Performance IP & NoCs

A leading technology company in Austin is looking for a Design Verification Engineer to enhance custom IPs for cutting-edge technologies. This position requires expertise in UVM and SystemVerilog, strong debugging skills, and collaboration with engineers on design functionality. Candidates should have experience in verifying digital designs and will enjoy benefits including comprehensive medical coverage and housing assistance. Expect some travel to the San Jose office for collaboration.
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