Senior Power-Aware ASIC Design Engineer

A leading engineering staffing firm is seeking a skilled Design Engineer for a contract position in Sunnyvale, CA. This role focuses on performing comprehensive power analysis during design stages from RTL to GDSII, requiring expertise in low-power implementation and industry-standard tools. The ideal candidate should possess at least 8 years of experience in ASIC design environments, a Bachelor's degree in a relevant field, and be adept in scripting languages like Python. This position offers competitive pay and a collaborative, fast-paced work environment.
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