Silicon Packaging Design Engineer — Shape Next-Gen ICs

A leading semiconductor company based in Phoenix, Arizona is looking for a Silicon Packaging Design Engineer to drive end-to-end development of mask and panel design. Ideal candidates will have a bachelor's degree in electrical engineering and relevant experience in physical layout aspects of substrate design. Strong analytical skills and familiarity with tools like Valor and Cadence APD are essential. This role offers competitive compensation and requires on-site presence.
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