FPGA Engineer
Moseley Technical Services, Inc., Bloomington, MN, United States
ASIC/FPGA Design Engineer
Bloomington, MN
Contract Position
Pay Estimated: $75.76-$80.76/Hour
Contribute to a company at the forefront of mission‑critical systems and technologies in defense and security. This leader in global defense integrates advanced technology to deliver information and insights on the battlefield, offering roles that support security and technological superiority across multiple domains.
Responsibilities
Define, design, simulate, and verify ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) architectures.
Develop detailed module interfaces, simulation plans, and test strategies to ensure functional and performance compliance.
Execute key phases of the RTL‑to‑GDSII flow, including high‑level design, synthesis, place & route, timing analysis, and power optimization.
Utilize industry‑standard ASIC/FPGA toolchains for design and simulation (e.g., Synopsys, Cadence, Mentor).
Review and select foundry technologies, device libraries, and EDA tools based on performance, cost, and feasibility.
Evaluate and analyze customer requirements, proposals, and technical manuals for design viability.
Lead or contribute to process improvement initiatives across ASIC/FPGA development practices.
Provide technical leadership and mentorship to junior engineers where applicable.
Collaborate cross‑functionally with engineering teams and interface with internal stakeholders and occasionally external customers.
Qualifications
U.S. Citizenship is required by Federal Law.
Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related STEM field and 5+ years of ASIC/FPGA design experience, or a Master’s degree with 3+ years of experience.
Ability to obtain a DoD Secret security clearance at the time of hire (U.S. Citizenship required).
Proficient in ASIC/FPGA design flows, including RTL coding, simulation, synthesis, static timing analysis, and verification.
Experience with HDL languages (VHDL, Verilog, SystemVerilog).
Skilled in design tools such as Vivado, Quartus, Synplify, ModelSim, QuestaSim, or equivalent.
Familiarity with reliability analysis, component selection, and design‑for‑test (DFT) methodologies.
Solid understanding of digital logic, timing closure, power estimation, and hardware debug techniques.
Proficiency with Microsoft Office Suite for technical documentation and reporting.
On‑site work required with possible occasional travel as needed.
Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer.
What to Expect
Applicants selected for employment will be required to pass a pre‑employment drug screening and background investigation, which may include education, criminal, and work history verifications.
Accepted applicants will be eligible for benefits, including medical and supplemental insurance, and a 401(k) plan.
Final position level and pay will be based on experience.
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Bloomington, MN
Contract Position
Pay Estimated: $75.76-$80.76/Hour
Contribute to a company at the forefront of mission‑critical systems and technologies in defense and security. This leader in global defense integrates advanced technology to deliver information and insights on the battlefield, offering roles that support security and technological superiority across multiple domains.
Responsibilities
Define, design, simulate, and verify ASIC (Application Specific Integrated Circuit) and/or FPGA (Field Programmable Gate Array) architectures.
Develop detailed module interfaces, simulation plans, and test strategies to ensure functional and performance compliance.
Execute key phases of the RTL‑to‑GDSII flow, including high‑level design, synthesis, place & route, timing analysis, and power optimization.
Utilize industry‑standard ASIC/FPGA toolchains for design and simulation (e.g., Synopsys, Cadence, Mentor).
Review and select foundry technologies, device libraries, and EDA tools based on performance, cost, and feasibility.
Evaluate and analyze customer requirements, proposals, and technical manuals for design viability.
Lead or contribute to process improvement initiatives across ASIC/FPGA development practices.
Provide technical leadership and mentorship to junior engineers where applicable.
Collaborate cross‑functionally with engineering teams and interface with internal stakeholders and occasionally external customers.
Qualifications
U.S. Citizenship is required by Federal Law.
Bachelor’s degree in Electrical Engineering, Computer Engineering, or a related STEM field and 5+ years of ASIC/FPGA design experience, or a Master’s degree with 3+ years of experience.
Ability to obtain a DoD Secret security clearance at the time of hire (U.S. Citizenship required).
Proficient in ASIC/FPGA design flows, including RTL coding, simulation, synthesis, static timing analysis, and verification.
Experience with HDL languages (VHDL, Verilog, SystemVerilog).
Skilled in design tools such as Vivado, Quartus, Synplify, ModelSim, QuestaSim, or equivalent.
Familiarity with reliability analysis, component selection, and design‑for‑test (DFT) methodologies.
Solid understanding of digital logic, timing closure, power estimation, and hardware debug techniques.
Proficiency with Microsoft Office Suite for technical documentation and reporting.
On‑site work required with possible occasional travel as needed.
Moseley Technical Services, Inc. is an AA/EEO/Veterans/Disabled Employer.
What to Expect
Applicants selected for employment will be required to pass a pre‑employment drug screening and background investigation, which may include education, criminal, and work history verifications.
Accepted applicants will be eligible for benefits, including medical and supplemental insurance, and a 401(k) plan.
Final position level and pay will be based on experience.
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