Senior RTL Design Engineer - DDR/IO IP

Advanced Micro Devices is seeking a Senior RTL Engineer to join its DDR PHY design team in Santa Clara, California. This role involves defining and implementing RTL for high-speed DDR and inter-chip IO IP for AMD’s products. Candidates should possess strong analytical skills, effective communication, and experience in digital design, particularly with high-speed interfaces. A Bachelor's or Master's in Electrical Engineering is preferred. The position is not eligible for visa sponsorship.
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