Senior RTL Design Engineer - SoC/ASIC & ARM/RISC-V

A leading technology firm is seeking a skilled engineer to design complex digital integrated circuits at the system level. The role involves developing micro-architecture, working with back-end teams, and supporting ASIC lab validations. Candidates should have experience in system-level designs using System Verilog, along with knowledge of processor subsystems and ASIC design flows. This position is located in San Jose, California, and offers an opportunity to work on cutting-edge technology.
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