RTL Design Engineer for Next-Gen ASIC/FPGA (Starlink)

A leading aerospace company in Irvine, CA, is seeking an RTL Design Engineer to design ASICs and FPGAs for Starlink projects. The ideal candidate will collaborate with cross-disciplinary teams to create cutting-edge solutions that enhance connectivity. A Bachelor's degree in Electrical Engineering or related field and at least one year of experience in RTL design are required. This role offers competitive compensation, comprehensive benefits, and opportunities for professional growth.
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