Senior RTL Design Engineer – Space ASICs (Silicon)

A leading aerospace company is seeking a motivated SR. RTL DESIGN ENGINEER to develop next-generation ASICs for the Starlink project. The ideal candidate will leverage their experience in RTL implementation to work on cutting-edge technology aimed at providing reliable internet globally. This role requires problem-solving skills, collaboration in cross-disciplinary teams, and a Bachelor's degree in relevant fields. Candidates should have strong knowledge in Verilog/System Verilog and EDA tools, along with the ability to tackle complex challenges.
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