Senior Analog PLL Design Engineer – Adaptive Clocking

A leading semiconductor company is seeking an experienced Circuit Design Engineer to join their PLL design team. The successful candidate will design complex PLL components and run verification flows ensuring performance and reliability. Required qualifications include expertise in mixed signal circuit design, hands-on experience with analog components, and a Master’s degree in Electrical Engineering. Strong teamwork, communication skills, and knowledge of industry-standard design tools are essential. This position is based in San Diego, CA and does not offer visa sponsorship.
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