Analog PLL Design Engineer - Adaptive Clocking

A leading semiconductor company is seeking a Circuit Design Engineer in San Diego, CA. The role involves designing advanced Phase Locked Loop (PLL) systems and requires solid knowledge of mixed signal circuit design with FinFET technology. A Master's in electrical engineering is preferred and experience in the semiconductor field is essential. The ideal candidate will contribute to innovative solutions while leading junior engineers and working in a collaborative environment. This position does not offer visa sponsorship.
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