Senior ASIC RTL Design Engineer: Cutting-Edge IPs

A leading semiconductor company is seeking a Senior ASIC Design Engineer to join their Silicon Design team in San Jose, CA. The ideal candidate will oversee the complete RTL design lifecycle for next-generation embedded products, ensuring design quality and timing closure. With expertise in Verilog RTL coding and ASIC development, you will mentor junior engineers and collaborate cross-functionally to tackle complex challenges. This role offers a vibrant culture within a company committed to innovation and excellence.
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