NXP Semiconductors N.V.
LPDDR Validation and Test Content Development Engineer
NXP Semiconductors N.V., Austin, Texas, us, 78716
We are seeking a highly skilled and detail-oriented LPDDR validation and test development Engineer to join our team. The LPDDR Validation Engineer will be responsible for ensuring the reliability, performance, and compliance of LPDDR memory interfaces in our products. This role requires strong technical expertise in hardware validation, LPDDR memory protocols and LPDDR testing content development.
Responsibilities:
Collaborating with hardware design engineers to understand LPDDR memory controller, DDRPHY and DRAM interface specifications and requirements.Developing validation plans and test procedures for LPDDR memory interfaces based on industry standards and product specifications.Designing and implementing validation test to evaluate LPDDR memory interface performance, reliability, and compliance.Develop LPDDR specific stress contents by generating maximum or sporadic traffics from all SoC masters to verify the entire data path from masters (CPU, GPU etc.) all the way to DRAM.Capturing LPDDR interface protocol and debugging to identify and resolve issues related to LPDDR memory protocol and interfaces.Analyzing validation test results and data to assess the performance and reliability of LPDDR memory interfaces.Collaborating with cross-functional teams to implement changes and enhancements based on validation findings.Staying up-to-date on industry trends, best practices, and emerging technologies related to DDR memory interfaces and validation methodologies.Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field. Master's degree preferred.6 years of experience in post -silicon validation /Pre - Silicon emulation of digital SOCsStrong understanding of LPDDR JEDEC memory protocols and interfaces.Strong fundamental understanding of DDR PHY circuitry in DLLs, I/O, and Calibration.Strong experiences in low level test content (firmware, device driver) development.Strong experiences in ARM CPU architecture and test content development in C/C++ and assembly.Experience with hardware validation, including developing test plans and procedures.Strong analytical and problem-solving skills.Meticulous attention to detail and strong organizational skills.Ability to work independently and collaboratively in a fast-paced environment.Excellent communication and collaboration skills.Experience with DDR memory validation in the semiconductor industry is a plus.
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.
Responsibilities:
Collaborating with hardware design engineers to understand LPDDR memory controller, DDRPHY and DRAM interface specifications and requirements.Developing validation plans and test procedures for LPDDR memory interfaces based on industry standards and product specifications.Designing and implementing validation test to evaluate LPDDR memory interface performance, reliability, and compliance.Develop LPDDR specific stress contents by generating maximum or sporadic traffics from all SoC masters to verify the entire data path from masters (CPU, GPU etc.) all the way to DRAM.Capturing LPDDR interface protocol and debugging to identify and resolve issues related to LPDDR memory protocol and interfaces.Analyzing validation test results and data to assess the performance and reliability of LPDDR memory interfaces.Collaborating with cross-functional teams to implement changes and enhancements based on validation findings.Staying up-to-date on industry trends, best practices, and emerging technologies related to DDR memory interfaces and validation methodologies.Qualifications:
Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science or a related field. Master's degree preferred.6 years of experience in post -silicon validation /Pre - Silicon emulation of digital SOCsStrong understanding of LPDDR JEDEC memory protocols and interfaces.Strong fundamental understanding of DDR PHY circuitry in DLLs, I/O, and Calibration.Strong experiences in low level test content (firmware, device driver) development.Strong experiences in ARM CPU architecture and test content development in C/C++ and assembly.Experience with hardware validation, including developing test plans and procedures.Strong analytical and problem-solving skills.Meticulous attention to detail and strong organizational skills.Ability to work independently and collaboratively in a fast-paced environment.Excellent communication and collaboration skills.Experience with DDR memory validation in the semiconductor industry is a plus.
More information about NXP in the United States...
NXP is an Equal Opportunity/Affirmative Action Employer regardless of age, color, national origin, race, religion, creed, gender, sex, sexual orientation, gender identity and/or expression, marital status, status as a disabled veteran and/or veteran of the Vietnam Era or any other characteristic protected by federal, state or local law. In addition, NXP will provide reasonable accommodations for otherwise qualified disabled individuals.